1. Technical Field of the Invention
The present invention relates to nonvolatile memory devices, and particularly to nonvolatile memory devices having sector protection circuitry.
2. Description of the Related Art
The first nonvolatile memories were electrically programmable read-only memories (EPROMS) . In these memories, the memory cells include a floating-gate transistor that is programmable using the hot carrier effect. Programming of an EPROM memory cell includes applying a potential difference between the drain and the source of the floating gate transistor in the presence of a high potential difference (of about 20 volts, this value varying according to the desired programming speed) between the control gate and the source. The application of the first of these potential differences generates an electrical field that gives rise to a flow of electrons in the channel. These electrons collide with atoms of the channel, causing the appearance of new free electrons. These electrons have very high energy (hence the term xe2x80x9chot carriersxe2x80x9d). The high difference in potential between the control gate and the source of the floating gate transistor gives rise to a strong electrical field between the floating gate and the substrate, the effect of which is that certain of these electrons are injected into the floating gate, thus putting the memory cell in a state known as a xe2x80x9cprogrammedxe2x80x9d state.
The fact that the programming of a memory cell requires the application of voltages both to the control gate and to the drain of the floating-gate transistor eliminates the need for the use of a selection transistor to program one particular memory cell without programming the others. This results in a relatively small silicon area and the effectuation of large scale integration . By contrast, the erasure of all the memory cells of the memory is done substantially simultaneously by exposing the memory cells to ultraviolet radiation.
In addressing the need to individually erase EPROM memory cells, electrically erasable programmable read only memories (EEPROMs) were created. These memories are electrically programmable and erasable by tunnel effect (i.e., the Fowler Nordheim effect) . The memory cells have a floating-gate transistor whose drain is connected to the bit line by a selection transistor. The gate of the selection transistor is connected to the word line. The gate of the floating-gate transistor is controlled by a bias transistor. Generally, the source of the floating gate transistor is connected to a reference potential, such as ground. These floating-gate transistors have an oxide layer between the substrate and the floating gate that is very thin to enable the transfer of charges by tunnel effect. The advantage of EEPROMs as compared with EPROMs lies in the fact that each memory cell is programmable and erasable independently of the other EEPROM cells. The tradeoff here is that a larger surface area of silicon is required and therefore a smaller scale of integration is achieved.
A third type of memory has more recently gained popularity. This type of memory, flash EPROMs, combines the relatively high integration of EPROMs with the ease of programming and erasure of EEPROMs. Flash memory cells can be individually programmed utilizing the hot carrier effect in the same way as EPROM cells are programmed. Flash memory cells are also electrically erasable by the tunnel effect. The memory cells of a flash EPROM memory includes a floating-gate transistor that has an oxide layer whose thickness is greater than the oxide layer thickness of an EEPROM floating gate transistor but smaller than the oxide layer thickness of an EPROM floating gate transistor. Consequently, the flash memory cell is capable of erasure by the tunnel effect. For erasure, a highly negative potential difference is created between the control gate and the source of the floating gate transistor, the drain being left in the high impedance state or connected to the ground potential so that a high electrical field is created which tends to remove the electrons from the floating gate.
Referring to FIG. 1, flash EPROM devices, hereinafter referred to as flash memory devices, typically include at least one array A of flash memory cells organized into rows and columns of flash memory cells. Array A is typically partitioned into blocks B, each of which is further divided into sectors S. A row decoder R and column decoder C are used to select a single row and at least one column of memory cells based upon the value of an externally generated address applied to the flash memory device. Sense amplifiers SA are coupled to the column lines corresponding to the columns of memory cells to amplify the voltage levels on the addressed column lines corresponding to the data values stored in the addressed flash memory cells. The particular implementations of array A, the row and column decoders and sense amplifiers SA are known in the art and will not be described further for reasons of simplicity.
Conventional nonvolatile memory devices, including flash memory devices, typically provide some type of modify protection so that one or more sectors in the nonvolatile memory device is read only. In one prior implementation, sector protection for a flash memory device is effectuated using software external to the nonvolatile memory device and volatile circuitry. In another prior implementation, sector protection is performed within the flash memory device in nonvolatile circuitry. In this implementation, the flash memory device includes sector protection circuitry for preventing data modification within an identified sector.
With reference to FIG. 1, the sector protection circuitry includes nonvolatile secondary storage elements disposed adjacent array A in the periphery of the flash memory device, for storing information that identifies sectors S that are to be modify protected. A command user interface U receives user-generated memory access operation commands and sends command information to circuits within the flash memory device for executing and/or managing the execution of the user-generated commands.
The existing flash memory device further includes access circuitry for reading, programming and erasing the secondary storage elements. A controller generally manages memory read and memory modify operations of memory cells within array A. Prior to managing/controlling a user-requested memory modify operation, the controller receives sector protection information from the secondary storage elements as well as user command information from the command user interface U, and determines whether the flash memory cells to be modified by the user-requested memory modify operation is in a sector S that is modify protected. Upon an affirmative determination that the flash memory cells to be modified are in a modify protected sector S, the controller prevents the memory modify operation from performing. Otherwise, the controller controls the various components/blocks within the flash memory device for executing the user-requested memory modify operation.
One shortcoming in having the above-discussed sector protection circuitry within the flash memory device is that rather complex algorithms are necessary in order to modify the information maintained by the secondary storage elements. The complex algorithms understandably result in more complicated circuitry being used in the existing flash memory device.
Based upon the foregoing, there is a need for more easily providing sector protection within a nonvolatile memory device, such as a flash memory.
Embodiments of the present invention overcome shortcomings in prior flash memory devices and satisfy a significant need for a nonvolatile memory device having a simpler technique for providing sector protection. In embodiments of the present invention, sector protection information is maintained in a set of memory cells in the core of nonvolatile memory cells. Control circuitry in the nonvolatile memory device selectively prevents memory modify operations in an addressed sector from being performed upon an affirmative determination that a memory cell in the set indicates that the addressed sector is modify protected. By including sector protection information in the core of memory cells, the circuitry used for reading and modifying the set of memory cells containing the sector protection information is the same circuitry used for reading and modifying the other memory cells in the memory cell core.